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1 l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks and thinsot is a trademark of analog devices, inc. all other trademarks are the property of their respective owners. typical a pplica t ion fea t ures descrip t ion 45v v in , 500ma low noise, linear regulator with programmable current limit and power good the lt ? 3065 series are micropower, low noise, low dropout voltage ( ldo) linear regulators that operate over a 1.8v to 45 v input voltage range. the devices supply 500 ma of output current with a typical dropout voltage of 300 mv. a single external capacitor provides programmable low noise reference performance and output soft-start functionality. a single external resistor programs the lt3065s current limit, accurate to 10% over a wide input voltage and tem - perature range . a pwrgd flag indicates output regulation. the lt3065 optimizes stability and transient response with low esr ceramic capacitors, requiring a minimum of 3.3f . internal protection circuitry includes current limiting with foldback, thermal limiting, reverse battery protection, reverse current protection and reverse output protection. the lt3065 is available in fixed output voltages of 1.2v, 1.5v, 1.8v, 2.5v, 3.3 v, and 5 v, and as an adjustable de - vice with an output voltage range from 0.6 v to 40 v. the lt3065 is available in the thermally-enhanced 10-lead 3mm 3mm dfn and 12-lead msop packages. 5v supply with 200ma precision current limit a pplica t ions n input voltage range: 1.8v to 45v n output current: 500ma n dropout voltage: 300mv n programmable precision current limit: 10% n power good flag n low noise: 25v rms (10hz to 100khz) n adjustable output (v ref = v out(min) = 600mv) n output tolerance: 2% over line, load and t emperature n stable with low esr, ceramic output capacitors (3.3f minimum) n single capacitor soft-starts reference and lowers output noise n current limit foldback protection n shutdown current: <1a n reverse battery and thermal limit protection n 10-lead 3mm 3mm dfn and 12-lead msop packages n battery-powered systems n automotive power supplies n industrial power supplies n avionic power supplies n portable instruments precision current limit, r imax = 1.5k temperature (c) ?75 current limit (ma) 204 212 220 125 3065 ta01b 196 188 200 208 216 192 184 180 ?25 25 75 ?50 150 0 50 100 175 v in = 5.6v v in = 10v v out(nominal) = 5v lt3065-5 gnd 500k 10nf out sense adj i max in shdn pwrgd ref/byp 3.3f 5.6v to 13v in 5v out 200ma 3.3f 1.5k 22nf 3065 ta01a 1nf lt 3065 series 3065fc for more information www.linear.com/lt3065
2 http://www .linear.com/product/lt3065#orderinfo a bsolu t e maxi m u m r a t ings in pin voltage ......................................................... 50 v out pin voltage ........................................... + 40 v, C50v input - to - output differential voltage ( note 2) .. +50 v , C 40 v adj pin voltage ...................................................... 50 v se nse p in voltage .................................................. 50 v shdn pin voltage ................................................... 50 v pwrgd pin voltage ....................................... C 0.3 v, 50v i max pin voltage .............................................. C 0.3 v, 7v ref / byp pin voltage ................................................... 1 v (note 1) o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range lt3065edd#pbf lt3065edd#trpbf lgks 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065idd#pbf lt3065idd#trpbf lgks 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065hdd#pbf lt3065hdd#trpbf lgks 10-lead (3mm x 3mm) plastic dfn C40c to 150c lt3065mpdd#pbf lt3065mpdd#trpbf lgks 10-lead (3mm x 3mm) plastic dfn C55c to 150c lt3065edd-1.2#pbf lt3065edd-1.2#trpbf lgqv 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065idd-1.2#pbf lt3065idd-1.2#trpbf lgqv 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065hdd-1.2#pbf lt3065hdd-1.2#trpbf lgqv 10-lead (3mm x 3mm) plastic dfn C40c to 150c lt3065mpdd-1.2#pbf lt3065mpdd-1.2#trpbf lgqv 10-lead (3mm x 3mm) plastic dfn C55c to 150c lt3065edd-1.5#pbf lt3065edd-1.5#trpbf lgqw 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065idd-1.5#pbf lt3065idd-1.5#trpbf lgqw 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065hdd-1.5#pbf lt3065hdd-1.5#trpbf lgqw 10-lead (3mm x 3mm) plastic dfn C40c to 150c lt3065mpdd-1.5#pbf lt3065mpdd-1.5#trpbf lgqw 10-lead (3mm x 3mm) plastic dfn C55c to 150c lt3065edd-1.8#pbf lt3065edd-1.8#trpbf lgqx 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065idd -1.8#pbf lt 3065idd-1.8#trpbf lgqx 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065hdd-1.8#pbf lt3065hdd-1.8#trpbf lgqx 10-lead (3mm x 3mm) plastic dfn C40c to 150c lt3065mpdd-1.8#pbf lt3065mpdd-1.8#trpbf lgqx 10-lead (3mm x 3mm) plastic dfn C55c to 150c lt3065edd-2.5#pbf lt3065edd-2.5#trpbf lgqy 10-lead (3mm x 3mm) plastic dfn C40c to 125c top view 11 gnd dd package 10-lead (3mm 3mm) plastic dfn 10 9 6 7 8 4 5 3 2 1 out out adj/sense* gnd/adj* ref/byp in in shdn pwrgd i max t jmax = 150c, ja = 31c/w, jc = 9c/w exposed pad ( pin 11) is gnd, must be soldered to pcb 1 2 3 4 5 6 in in shdn pwrgd i max nc 12 11 10 9 8 7 out out adj/sense* gnd/adj* ref/byp nc top view 13 gnd mse package 12-lead plastic msop t jmax = 150c, ja = 28c/w, jc = 6c/w exposed pad ( pin 13) is gnd, must be soldered to pcb *pin 7: gnd for lt3065, adj for lt3065-1.2, lt3065-1.5, lt3065-1.8, lt3065-2.5, lt3065-3.3, lt3065-5 * pin 8: adj for lt3065, sense for lt3065-1.2, lt3065-1.5, lt3065-1.8, lt3065-2.5, lt3065-3.3, lt3065-5 * pin 9: gnd for lt3065, adj for lt3065-1.2, lt3065-1.5, lt3065-1.8, lt3065-2.5, lt3065-3.3, lt3065-5 * pin 10: adj for lt3065, sense for lt3065-1.2, lt3065-1.5, lt3065-1.8, lt3065-2.5, lt3065-3.3, lt3065-5 p in c on f igura t ion output short - circuit duration .......................... in definite operating junction temperature range ( notes 3, 5, 14) e -, i- grades ....................................... C 40 c to 125 c mp - gr ade .......................................... C 55 c to 150 c h- gr ade ............................................. C 40 c to 150 c storage temperature range .................. C 65 c to 150 c lead temperature ( soldering , 10 sec ) ms op package only ......................................... 300 c lt 3065 series 3065fc for more information www.linear.com/lt3065
3 lead free finish tape and reel part marking* package description temperature range lt3065idd-2.5#pbf lt3065idd-2.5#trpbf lgqy 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065hdd-2.5#pbf lt3065hdd-2.5#trpbf lgqy 10-lead (3mm x 3mm) plastic dfn C40c to 150c lt3065mpdd-2.5#pbf lt3065mpdd-2.5#trpbf lgqy 10-lead (3mm x 3mm) plastic dfn C55c to 150c lt3065edd-3.3#pbf lt3065edd-3.3#trpbf lgqz 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065idd-3.3#pbf lt3065idd-3.3#trpbf lgqz 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065hdd-3.3#pbf lt3065hdd-3.3#trpbf lgqz 10-lead (3mm x 3mm) plastic dfn C40c to 150c lt3065mpdd-3.3#pbf lt3065mpdd-3.3#trpbf lgqz 10-lead (3mm x 3mm) plastic dfn C55c to 150c lt3065edd-5#pbf lt3065edd-5#trpbf lgrb 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065idd-5#pbf lt3065idd-5#trpbf lgrb 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3065hdd-5#pbf lt3065hdd-5#trpbf lgrb 10-lead (3mm x 3mm) plastic dfn C40c to 150c lt3065mpdd-5#pbf lt3065mpdd-5#trpbf lgrb 10-lead (3mm x 3mm) plastic dfn C55c to 150c lt3065emse#pbf lt3065emse#trpbf 3065 12-lead plastic msop C40c to 125c lt3065imse#pbf lt3065imse#trpbf 3065 12-lead plastic msop C40c to 125c lt3065hmse#pbf lt3065hmse#trpbf 3065 12-lead plastic msop C40 c to 150c lt3065mpmse#pbf lt3065mpmse#trpbf 3065 12-lead plastic msop C55c to 150c lt3065emse-1.2#pbf lt3065emse-1.2#trpbf 306512 12-lead plastic msop C40c to 125c lt3065imse-1.2#pbf lt3065imse-1.2#trpbf 306512 12-lead plastic msop C40c to 125c lt3065hmse-1.2#pbf lt3065hmse-1.2#trpbf 306512 12-lead plastic msop C40c to 150c lt3065mpmse-1.2#pbf lt3065mpmse-1.2#trpbf 306512 12-lead plastic msop C55c to 150c lt3065emse-1.5#pbf lt3065emse-1.5#trpbf 306515 12-lead plastic msop C40c to 125c lt3065imse-1.5#pbf lt3065imse-1.5#trpbf 306515 12-lead plastic msop C40c to 125c lt3065hmse-1.5#pbf lt3065hmse-1.5#trpbf 306515 12-lead plastic msop C40c to 150c lt3065mpmse-1.5#pbf lt3065mpmse-1.5#trpbf 306515 12-lead plastic msop C55c to 150c lt3065emse-1.8#pbf lt3065emse-1.8#trpbf 306518 12-lead plastic msop C40c to 125c lt3065imse-1.8#pbf lt3065imse-1.8#trpbf 306518 12-lead plastic msop C40c to 125c lt3065hmse-1.8#pbf lt3065hmse-1.8#trpbf 306518 12-lead plastic msop C40c to 150c lt3065mpmse-1.8#pbf lt3065mpmse-1.8#trpbf 306518 12-lead plastic msop C55c to 150c lt3065emse-2.5#pbf lt3065emse-2.5#trpbf 306525 12-lead plastic msop C40c to 125c lt3065imse-2.5#pbf lt3065imse-2.5#trpbf 306525 12-lead plastic msop C40c to 125c lt3065hmse-2.5#pbf lt3065hmse-2.5#trpbf 306525 12-lead plastic msop C40c to 150c lt3065mpmse-2.5#pbf lt3065mpmse-2.5#trpbf 306525 12-lead plastic msop C55c to 150c lt 3065emse-3.3#pbf lt3065emse-3.3#trpbf 306533 12-lead plastic msop C40c to 125c lt3065imse-3.3#pbf lt3065imse-3.3#trpbf 306533 12-lead plastic msop C40c to 125c lt3065hmse-3.3#pbf lt3065hmse-3.3#trpbf 306533 12-lead plastic msop C40c to 150c lt3065mpmse-3.3#pbf lt3065mpmse-3.3#trpbf 306533 12-lead plastic msop C55c to 150c lt3065emse-5#pbf lt3065emse-5#trpbf 30655 12-lead plastic msop C40c to 125c lt3065imse-5#pbf lt3065imse-5#trpbf 30655 12-lead plastic msop C40c to 125c lt3065hmse-5#pbf lt3065hmse-5#trpbf 30655 12-lead plastic msop C40c to 150c lt3065mpmse-5#pbf lt3065mpmse-5#trpbf 30655 12-lead plastic msop C55c to 150c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. some packages are available in 500 unit reels through designated sales channels with #trmpbf suffix. o r d er i n f or m a t ion lt 3065 series 3065fc for more information www.linear.com/lt3065
4 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c (note 3). parameter conditions min typ max units minimum input voltage (notes 4, 9) i load = 500ma l 1.8 2.2 v regulated output voltage lt3065-1.2: v in = 2.2v, i load = 1ma 2.2v < v in < 45v, 1ma < i load < 500ma lt3065-1.5: v in = 2.2v, i load = 1ma 2.2v < v in < 45v, 1ma < i load < 500ma lt3065-1.8: v in = 2.4v, i load = 1ma 2.4v < v in < 45v, 1ma < i load < 500ma lt3065-2.5: v in = 3.1v, i load = 1ma 3.1v < v in < 45v, 1ma < i load < 500ma lt3065-3.3: v in = 3.9v, i load = 1ma 3.9v < v in < 45v, 1ma < i load < 500ma lt3065-5: v in = 5.6v, i load = 1ma 5.6v < v in < 45v, 1ma < i load < 500ma l l l l l l 1.188 1.176 1.485 1.470 1.782 1.764 2.475 2.450 3.267 3.234 4.950 4.900 1.2 1.5 1.8 2.5 3.3 5 1.212 1.224 1.515 1.530 1.818 1.836 2.525 2.550 3.333 3.366 5.050 5.100 v v v v v v v v v v v v adj pin v oltage (notes 4, 5) lt3065: v in = 2.2v, i load = 1ma 2.2v < v in < 45v, 1ma < i load < 500ma l 594 588 600 606 612 mv mv line regulation i load = 1ma lt3065-1.2: v in = 2.2v to 45v lt3065-1.5: v in = 2.2v to 45v lt3065-1.8: v in = 2.4v to 45v lt3065-2.5: v in = 3.1v to 45v lt3065-3.3: v in = 3.9v to 45v lt3065-5: v in = 5.6v to 45v lt3065: v in = 2.2v to 45v (note 4) l l l l l l l 0.7 0.9 1.1 1.6 2.0 3.1 0.1 7 8.8 10.5 14.6 19.3 29.2 3 mv mv mv mv mv mv mv load regulation i load = 1ma to 500ma lt3065-1.2, v in = 2.2v lt3065-1.5, v in = 2.2v lt3065-1.8, v in = 2.4v lt3065-2.5 v in = 3.1v lt3065-3.3, v in = 3.9v lt3065-5, v in = 5.6v lt3065, v in = 2.2v (note 4) l l l l l l l 0.5 0.7 0.9 1.2 1.6 2.4 0.1 8 10 12 16.7 11 33.4 4 mv mv mv mv mv mv mv dropout voltage, v in = v out(nominal) (notes 6, 7) i load = 10ma l 110 150 210 mv mv i load = 50ma l 145 200 310 mv mv i load = 100ma l 175 220 330 mv mv i load = 500ma l 300 350 510 mv mv gnd pin current, v in = v out(nominal) + 0.6v (notes 7, 8) i load = 0ma i load = 1ma i load = 10ma i load = 100ma i load = 500ma l l l l l 55 100 270 1.8 11 110 200 550 4.5 25 a a a ma ma quiescent current in shutdown v in = 45v, v shdn = 0v 0.2 1 a adj pin bias current (notes 4, 10) v in = 2.2v l 16 60 na output voltage noise c out = 10f, i load = 500ma, v out = 600mv, bw = 10hz to 100khz 90 v rms c out = 10f, c byp = 10nf, i load = 500ma, v out = 600mv, bw = 10hz to 100khz 25 v rms shutdown threshold v out = off to on v out = on to off l l 0.9 1. 3 1.1 1.42 v v lt 3065 series 3065fc for more information www.linear.com/lt3065
5 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c (note 3). shdn pin current (note 11) v shdn = 0v, v in = 45v v shdn = 45v, v in = 45v l l 0.5 1 3 a a ripple rejection v in C v out = 2v, v ripple = 0.5v p-p , f ripple = 120hz, i load = 500ma lt3065-1.2 lt3065-1.5 lt3065-1.8 lt3065-2.5 lt3065-3.3 lt3065-5 lt3065 63 63 59 57 56 55 70 78 78 74 72 71 70 85 db db db db db db db input reverse leakage current v in = C45v, v out = 0 l 300 a reverse output current (note 12) v out = 1.2v, v in = v shdn = 0 0 10 a internal current limit (note 4) v in = 2.2v, v out = 0, v imax = 0 v in = 2.2v, v out = C5% l 520 900 ma ma external programmed current limit (notes 7, 13) 5.6v < v in < 10v, v out = 95% of v out (nominal), r imax = 1.5k 5.6v < v in < 7v, v out = 95% of v out (nominal), r imax = 604 l l 180 445 200 495 220 545 ma ma p wrgd logic low v oltage pull-up current = 50a l 0.07 0.25 v pwrgd leakage current v pwrgd = 45v 0.01 1 a pwrgd trip point % of nominal output voltage, output rising l 86 90 94 % pwrgd trip point hysteresis % of nominal output voltage 1.6 % note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: absolute maximum input-to-output differential voltage is not achievable with all combinations of rated in pin and out pin voltages. with in at 50v, do not pull out below 0v. the total differential voltage from in to out must not exceed +50v, C40v. if out is pulled above in and gnd, the out to in differential voltage must not exceed 40v. note 3: the lt3065 regulator is tested and specified under pulse load conditions such that t j ? t a . the lt3065e regulators are 100% tested at t a = 25c and performance is guaranteed from 0c to 125c. performance at C40c to 125c is assured by design, characterization and correlation with statistical process controls. the lt3065i regulators are guaranteed over the full C40c to 125c operating junction temperature range. the lt3065mp regulators are 100% tested over the C55c to 150c operating junction temperature range. the lt3065h regulators are 100% tested at the 150c operating junction temperature. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 4: the lt3065 adjustable version is tested and specified for these conditions with the adj pin connected to the out pin. note 5: maximum junction temperature limits operating conditions. regulated output voltage specifications do not apply for all possible combinations of input voltage and output current. if operating at the maximum input voltage, limit the output current range. if operating at the maximum output current, limit the input voltage range. current limit foldback limits the maximum output current as a function of input-to- output voltage. see current limit vs v in C v out in the typical performance characteristics section. note 6: dropout voltage is the minimum in-to-out differential voltage needed to maintain regulation at a specified output current. in dropout, the output voltage equals (v in C v dropout ). for some output voltages, minimum input voltage requirements limit dropout voltage. note 7: to satisfy minimum input voltage requirements, the lt3065 is tested and specified for these conditions with an external resistor divider (60.4k bottom, 442k top) which sets v out to 5v. the divider adds 10ua of output dc load. this external current is not factored into gnd pin current. note 8: gnd pin current is tested with v in = v out(nominal) + 0.6v and a current source load. gnd pin current increases in dropout. see gnd pin current cur ves in the typical performance characteristics section. note 9: to satisfy requirements for minimum input voltage, current limit is tested at v in = v out(nominal) + 1v or v in = 2.2v, whichever is greater. note 10: adj pin bias current flows out of the adj pin. note 11: shdn pin current flows into the shdn pin. note 12: reverse output current is tested with the in pin grounded and the out pin forced to the specified voltage. this current flows into the out pin and out of the gnd pin. note 13: current limit varies inversely with the external resistor value tied from the imax pin to gnd. for detailed information on selecting the imax resistor value, see the operation section. if the externally programmed current limit feature is unused, tie the imax pin to gnd. the internal current limit circuitry implements short-circuit protection as specified. note 14: this ic includes over temperature protection that protects the device during overload conditions. junction temperature exceeds 125c (lt3065e, lt3065i) or 150c (lt3065mp, lt3065h) when the over temperature circuitry is active. continuous operation above the specified maximum junction temperature may impair device reliability. lt 3065 series 3065fc for more information www.linear.com/lt3065
6 typical p er f or m ance c harac t eris t ics quiescent current lt3065-1.5 output voltage lt3065-1.2 output voltage typical dropout voltage guaranteed dropout voltage dropout voltage output current (ma) 0 dropout voltage (mv) 300 400 500 600 400 3065 g01 200 100 250 350 450 550 150 50 0 100 200 300 50 450 150 250 350 500 t j = 25c t j = 125c t j = 150c output current (ma) 0 0 dropout voltage (mv) 100 200 300 700 500 100 200 250 450 600 400 50 150 250 650 450 550 350 50 150 300 350 400 500 3065 g02 t j = 25c t j = 150c = test points temperature (c) ?75 dropout voltage (mv) 300 400 500 600 125 3065 g03 200 100 250 350 450 550 150 50 0 ?25 25 75 ?50 150 0 50 100 175 i l = 10ma i l = 100ma i l = 500ma i l = 50ma temperature (c) ?75 quiescent current (a) 60 70 100 110 130 125 3065 g04 40 20 50 90 80 120 30 10 0 ?25 25 75 ?50 150 0 50 100 175 v in = v shdn = 12v v out = 5v i l = 10a v in = 12v all other pins = 0v t j = 25c, unless otherwise noted. temperature (c) ?75 output voltage (v) 1.200 1.204 1.216 1.220 125 3065 g05 1.192 1.184 1.196 1.212 1.208 1.224 1.188 1.180 1.176 ?25 25 75 ?50 150 0 50 100 175 i l = 1ma temperature (c) ?75 output voltage (v) 1.500 1.505 1.520 1.525 125 3065 g06 1.490 1.480 1.495 1.515 1.510 1.530 1.485 1.475 1.470 ?25 25 75 ?50 150 0 50 100 175 i l = 1ma temperature (c) ?75 output voltage (v) 1.800 1.806 1.824 1.830 125 3065 g07 1.776 1.794 1.818 1.812 1.836 1.782 1.788 1.770 1.764 ?25 25 75 ?50 150 0 50 100 175 i l = 1ma temperature (c) ?75 output voltage (v) 2.50 2.51 2.54 125 3065 g08 2.47 2.49 2.53 2.52 2.55 2.48 2.46 2.45 ?25 25 75 ?50 150 0 50 100 175 i l = 1ma temperature (c) ?75 output voltage (v) 3.311 3.322 3.355 125 3065 g09 3.278 3.300 3.344 3.333 3.366 3.289 3.267 3.256 3.245 3.234 ?25 25 75 ?50 150 0 50 100 175 i l = 1ma lt3065-1.8 output voltage lt3065-2.5 output voltage lt3065-3.3 output voltage lt 3065 series 3065fc for more information www.linear.com/lt3065
7 typical p er f or m ance c harac t eris t ics adj pin voltage lt3065-5 output voltage t j = 25c, unless otherwise noted. temperature (c) ?75 adj pin voltage (mv) 600 604 608 612 125 3065 g11 596 592 598 602 606 610 594 590 588 ?25 25 75 ?50 150 0 50 100 175 i l = 1ma temperature (c) ?75 output voltage (v) 5.02 5.04 125 3065 g10 4.98 5.00 5.08 5.06 5.10 4.96 4.94 4.92 4.90 ?25 25 75 ?50 150 0 50 100 175 i l = 1ma quiescent current input voltage (v) 0 quiescent current (a) 125 150 8 3065 g12 75 100 175 200 50 25 0 2 4 6 1 9 3 5 7 1110 v shdn = v in v shdn = 0v t j = 25c r l = 240k v out = 1.2v input voltage (v) 0 quiescent current (a) 125 150 8 3065 g13 75 100 175 200 50 25 0 2 4 6 1 9 3 5 7 1110 v shdn = v in v shdn = 0v t j = 25c r l = 300k v out = 1.5v input voltage (v) 0 quiescent current (a) 125 150 8 3065 g14 75 100 175 200 50 25 0 2 4 6 1 9 3 5 7 1110 v shdn = v in v shdn = 0v t j = 25c r l = 360k v out = 1.8v input voltage (v) 0 quiescent current (a) 125 150 8 3065 g15 75 100 175 200 50 25 0 2 4 6 1 9 3 5 7 1110 v shdn = v in v shdn = 0v t j = 25c r l = 500k v out = 2.5v input voltage (v) 0 quiescent current (a) 125 150 8 3065 g16 75 100 175 200 50 25 0 2 4 6 1 9 3 5 7 1110 v shdn = v in v shdn = 0v t j = 25c r l = 660k v out = 3.3v input voltage (v) 0 quiescent current (a) 125 150 8 3065 g17 75 100 175 200 50 25 0 2 4 6 1 9 3 5 7 1110 v shdn = v in v shdn = 0v t j = 25c r l = 1m v out = 5v v in (v) 0 0 quiescent current (a) 10 30 40 50 100 110 120 130 70 5 10 15 20 3065 g18 20 80 90 60 25 30 45 35 40 t j = 25c v out = 5v i l = 10a v shdn = 0v v shdn = v in lt3065-1.2 quiescent current lt3065-1.5 quiescent current lt3065-3.3 quiescent current lt3065-5 quiescent current lt3065-2.5 quiescent current lt3065-1.8 quiescent current lt 3065 series 3065fc for more information www.linear.com/lt3065
8 typical p er f or m ance c harac t eris t ics shdn pin current gnd pin current vs i load shdn pin threshold input voltage (v) 0 gnd pin current (ma) 18 20 8 3065 g19 12 16 14 22 24 10 8 6 4 2 0 2 4 6 1 9 3 5 7 121110 t j = 25c *for v out = 1.2v v shdn = v in r l = 2.4 i l = 500ma* r l = 4.8 i l = 250ma* r l = 12 i l = 100ma* r l = 120 i l = 10ma* input voltage (v) 0 gnd pin current (ma) 18 20 8 3065 g20 12 16 14 22 24 10 8 6 4 2 0 2 4 6 1 9 3 5 7 121110 t j = 25c *for v out = 1.5v v shdn = v in r l = 3 i l = 500ma* r l = 6 i l = 250ma* r l = 15 i l = 100ma* r l = 150 i l = 10ma* input voltage (v) 0 gnd pin current (ma) 18 20 8 3065 g21 12 16 14 22 24 10 8 6 4 2 0 2 4 6 1 9 3 5 7 121110 t j = 25c *for v out = 1.8v v shdn = v in r l = 3.6 i l = 100ma* r l = 7.2 i l = 250ma* r l = 18 i l = 100ma* r l = 180 i l = 10ma* input voltage (v) 0 gnd pin current (ma) 18 20 8 3065 g22 12 16 14 22 24 10 8 6 4 2 0 2 4 6 1 9 3 5 7 121110 t j = 25c *for v out = 2.5v v shdn = v in r l = 5 i l = 500ma* r l = 10 i l = 250ma* r l = 25 i l = 100ma* r l = 250 i l = 10ma* input voltage (v) 0 gnd pin current (ma) 18 20 8 3065 g23 12 16 14 22 24 10 8 6 4 2 0 2 4 6 1 9 3 5 7 121110 t j = 25c *for v out = 3.3v v shdn = v in r l = 6.6 i l = 500ma* r l = 13.2 i l = 250ma* r l = 33 i l = 100ma* r l = 330 i l = 10ma* input voltage (v) 0 gnd pin current (ma) 18 20 8 3065 g24 12 16 14 22 24 10 8 6 4 2 0 2 4 6 1 9 3 5 7 121110 t j = 25c *for v out = 5v v shdn = v in r l = 10 i l = 500ma* r l = 20 i l = 250ma* r l = 50 i l = 100ma* r l = 500 i l = 10ma* i load (ma) 0 gnd pin current (ma) 12 16 20 400 3065 g25 8 4 10 14 18 6 2 0 100 200 300 50 450 150 250 350 500 v in = 5.6v v out = 5v temperature (c) ?75 shdn pin threshold (v) 1.0 1.2 1.4 1.5 1.3 1.1 0.9 25 50 100 175 0.6 0.8 0.2 0.4 0.5 0.7 0.1 0.3 0 ?50 ?25 0 75 125 150 3065 g26 off to on on to off temperature (c) 0 shdn pin current (a) 1.0 2.0 3.0 0.5 1.5 2.5 ?25 25 75 125 3065 g27 175 ?50?75 0 50 100 150 shdn = 45v lt3065-1.2 gnd pin current lt3065-2.5 gnd pin current lt3065-1.5 gnd pin current lt3065-3.3 gnd pin current lt3065-1.8 gnd pin current lt3065-5 gnd pin current lt 3065 series 3065fc for more information www.linear.com/lt3065
9 typical p er f or m ance c harac t eris t ics t j = 25c, unless otherwise noted. shdn pin input current adj pin bias current internal current limit shdn pin voltage (v) 0 0 shdn pin current (a) 0.5 1.5 2.0 2.5 10 20 25 45 3065 g28 1.0 5 15 30 35 40 3.0 temperature (c) ?75 adj pin current (na) 30 40 50 125 3065 g29 20 10 25 35 45 15 5 0 ?25 25 75 ?50 150 0 50 100 175 temperature (c) ?75 output current (a) 120 160 180 125 3065 g33 80 40 100 140 60 20 0 ?25 25 75 ?50 150 0 50 100 175 i adj i out v out = v adj = 1.2v v in = 0v frequency (hz) 10 100 30 ripple rejection (db) 40 50 60 70 1k 10k 100k 1m 10m 3065 g34 20 10 0 80 90 i load = 500ma c out = 10f v out = 3.3v v in = 4.3v + 50mv rms ripple c ref/byp = 10nf c ref/byp = 1nf c ref/byp = 0nf c ref/byp = 100pf frequency (hz) 10 100 30 ripple rejection (db) 40 50 60 70 1k 10k 100k 1m 10m 3065 g35 20 10 0 80 90 i load = 500ma c ref/byp = 10nf v out = 3.3v v in = 4.3v + 50mv rms ripple c out = 10f c out = 3.3f temperature (c) ?75 0 psrr 10 30 40 50 75 100 125 150 90 3065 g36 20 ?50 ?25 0 25 50 175 60 70 80 i load = 500ma c ref/byp = 10nf v out = 3.3v v in = 4.3v + 50mv rms ripple f = 120hz temperature (c) ?75 current limit (a) 1.0 1.2 1.4 1.5 1.3 1.1 0.9 25 50 100 175 0.6 0.8 0.2 0.4 0.5 0.7 0.1 0.3 0 ?50 ?25 0 75 125 150 3065 g30 v in = 6v v out = 0v v in ? v out (v) 0 0 current limit (a) 0.1 0.3 0.4 0.5 1.2 0.7 10 20 25 45 3065 g31 0.2 0.8 0.9 1.0 1.1 0.6 5 15 30 35 40 ?55c ?40c 25c 125c 150c v out (v) 0 0 output current (a) 0.1 0.3 0.4 0.5 1.0 0.7 10 20 25 40 3065 g32 0.2 0.8 0.9 0.6 5 15 30 35 v in = 0 internal current limit reverse output current input ripple rejection input ripple rejection input ripple rejection reverse output current lt 3065 series 3065fc for more information www.linear.com/lt3065
10 typical p er f or m ance c harac t eris t ics t j = 25c, unless otherwise noted. output noise spectral density c ref/byp = 0, c ff = 0 output noise spectral density vs c ref/byp , c ff = 0 output noise spectral density vs c ff , c ref/byp = 10nf rms output noise, vs feedforward capacitor (c ff ) temperature (c) ?75 minimum input voltage (v) 0.6 1.8 2.0 2.2 ?25 25 50 75 100 125 150 175 3065 g37 0.2 1.4 1.0 0.4 1.6 0 1.2 0.8 ?50 0 i l = 500ma temperature (c) ?75 load regulation (mv) 0 1 2 150125 3065 g38 ?1 ?2 ?4 ?25 25 75 ?50 175 0 50 100 ?3 4 3 ?i l = 1ma to 500ma v out = 0.6v v in = 2.2v frequency (hz) 0.1 output noise spectral density (v/hz) 1 10 1k 10k 100k 3065 g39 0.01 100 10 v out = 5v v out = 3.3v v out = 2.5v v out = 1.2v v out = 0.6v c out = 10f i l = 500ma frequency (hz) 0.1 output noise spectral density (v/hz) 1 10 1k 10k 100k 3065 g40 0.01 100 10 v out = 5v v out = 0.6v c out = 10f i l = 500ma c ref/byp = 100pf c ref/byp = 1nf c ref/byp = 10nf frequency (hz) 0.1 output noise spectral density (v/hz) 1 10 1k 10k 100k 3065 g41 0.01 100 10 v out = 5v c out = 10f i l = 500ma c ff = 0pf c ff = 100pf c ff = 1nf c ff = 10nf start-up time vs ref/byp capacitor rms output noise vs load current vs c ref/byp = 10nf, c ff = 0 minimum input voltage load regulation load current (ma) 0.01 40 output noise voltage (v rms ) 50 60 70 80 0.1 1 10 100 1000 3065 g42 30 20 10 0 90 110 c ref/byp = 0pf c ref/byp = 100pf c ref/byp = 1nf c ref/byp = 10nf 100 f = 10hz to 100khz c out = 10f load current (ma) 0.01 output voltage noise (v rms ) 120 140 160 0.1 1 10 100 1000 3065 g43 40 60 80 100 20 0 200 180 v out = 5v v out = 3.3v v out = 1.8v v out = 1.2v v out = 1.5v v out = 2.5v v out = 0.6v f = 10hz to 100khz c out = 10f feedforward capacitor, c ff (nf) 20 output noise voltage (v rms ) 40 60 80 100 0.01 1 10 3065 g44 0 0.1 120 10 30 50 70 90 110 f = 10hz to 100khz c ref/byp = 10nf c out = 10f i fb-divider = 10a i load = 500ma v out = 5v v out = 3.3v v out = 2.5v v out = 1.2v v out = 0.6v ref/byp capacitor (nf) 0.1 start-up time (ms) 10 1000 1 100 100 3065 g45 1000 10 1 c ff = open rms output noise, v out = 0.6v, c ff = 0 lt 3065 series 3065fc for more information www.linear.com/lt3065
11 typical p er f or m ance c harac t eris t ics 5v transient response c ff = 0, i out = 50ma to 500ma 5v transient response c ff = 10nf, i out = 50ma to 500ma shdn transient response c ref/byp = 0 transient response (load dump) shdn transient response c ref/byp = 10nf t j = 25c, unless otherwise noted. 10hz to 100khz output noise c ref/byp = 10nf, c ff = 0 10hz to 100khz output noise c ref/byp = 10nf, c ff = 10nf v out 200v/div 2ms/div c out = 10f i load = 500ma v out = 5v 3065 g46 v out 200v/div 2ms/div c out = 10f i load = 500ma v out = 5v 3065 g47 v out 100mv/div i out 500ma/div 100s/div v in = 6v c out = 10f i fb-divider = 10a v out = 5v 3065 g48 v out 100mv/div i out 500ma/div 20s/div v in = 6v c out = 10f i fb-divider = 10a v out = 5v 3065 g49 v out 20mv/div 45v v in 10v/div 12v 1ms/div v out = 5v i out = 100ma c out = 10f 3065 g50 out 5v/div i l = 500ma ref/byp 500mv/div shdn 2v/div 2ms/div 3065 g51 out 5v/div i l = 500ma ref/byp 500mv/div shdn 2v/div 2ms/div 3065 g52 lt 3065 series 3065fc for more information www.linear.com/lt3065
12 typical p er f or m ance c harac t eris t ics t j = 25c, unless otherwise noted. in (pins 1, 2/pins 1, 2): input. these pin(s) supply power to the device. the lt3065 requires a local in bypass capacitor if it is located more than six inches from the main input filter capacitor. in general, battery output imped - ance rises with frequency, so adding a bypass capacitor in battery-powered circuits is advisable. an input bypass capacitor in the range of 1 f to 10 f generally suffices. see input capacitance and stability in the applications information section for more information. the lt3065 withstands reverse voltages on the in pin with respect to its gnd and out pins. in such case, such as a battery plugged in backwards, the lt3065 behaves as if a diode is in series with its input. no reverse current flows into the lt3065 and no reverse voltage appears at the load. the device protects itself and the load. shdn (pin 3/pin 3): shutdown. pulling the shdn pin low puts the lt3065 into a low power state and turns the output off. drive the shdn pin with either logic or an open collector/drain with a pull-up resistor. the resistor supplies the pull-up current to the open collector/drain logic, normally several microamperes, and the shdn pin current, typically less than 2 a. if unused, connect the shdn pin to in. the lt3065 does not function if the shdn pin is not connected. temperature (c) ?75 current limit (ma) 204 212 220 125 3065 g53 196 188 200 208 216 192 184 180 ?25 25 75 ?50 150 0 50 100 175 v in = 10v v in = 5.6v v out(nominal) = 5v temperature (c) ?75 current limit (ma) 510 530 550 125 3065 g54 490 470 500 520 540 480 460 450 ?25 25 75 ?50 150 0 50 100 175 5.6v 7v 10v v out(nominal) = 5v temperature (c) ?75 adj pin voltage (mv) 550 570 590 125 3065 g55 530 510 540 560 580 520 500 490 ?25 25 75 ?50 150 0 50 100 175 adj pin rising threshold adj pin falling threshold pwrgd (pin 4/pin 4): power good. the pwrgd pin is an open-drain output that actively pulls low if the output is less than 90% of the nominal output value. the pwrgd pin is capable of sinking 50 a. there is no internal pull-up resistor; an external pull-up resistor must be used. i max (pin 5/pin 5): precision current limit programming. this pin is the collector of a current mirror pnp that is 1/500th the size of the output power pnp. this pin is also the input to the current limit amplifier. the current limit threshold is set by connecting a resistor between the i max pin and gnd. for detailed information on how to set the i max pin resistor value, see the applications information section. the i max pin requires a 22 nf de-coupling capacitor to ground. if not used, tie i max to gnd. nc (pins 6, 7, mse package only): no connect. these pins have no connection to internal circuitry. these pins may be floated or connected to gnd. ref/ byp ( pin 6/pin 8): bypass/ soft start. connecting a capacitor from this pin to gnd bypasses the lt3065 s ref - erence noise and soft- starts the reference. a 10nf bypass capacitor typically reduces output voltage noise to 25v rms in a 10hz to 100khz bandwidth. soft - start time is directly precision current limit, r imax = 1.5k precision current limit, r imax = 604 pwrgd threshold voltage p in func t ions (dfn/msop) lt 3065 series 3065fc for more information www.linear.com/lt3065
13 p in func t ions (dfn/msop) temperature in the typical performance characteristics section). the adj pin voltage is 600mv referenced to gnd. connecting a capacitor from out to adj reduces output noise and improves transient response for output voltages greater than 600 mv. see the applications information sec - tion for calculating the value of the feedforward capacitor. at output voltages above 0.6v , the resistor divider connected to the adj pin is used to regulate voltage at the load. parasitic resistances of pcb traces or cables can therefore result in load regulation errors at high output currents. to eliminate these, connect the resistor divider directly to the load for a kelvin sense connection, as shown in figure 1. fixed voltage version only gnd ( exposed pad pin 11, exposed pad pin 13): ground. the exposed pad of the dfn and msop packages is an electrical connection to gnd. to ensure proper electrical and thermal performance, solder pin 11/pin 13 to the pcb ground. sense (pin 8/pin 10): sense. this pin is the top of the internal resistor divider network, and should be connected directly to the load, as a kelvin sense, for optimum load regulation and transient performance. connecting this pin to the output pin at the package, rather than directly to the load, can result in load regulation errors due to the current across the parasitic resistance of the pcb trace. adj (pin 7/pin 9): adjust. this pin is the midpoint of the internal resistor divider network and the inverting input to the error amplifier. connecting a capacitor from the out to adj reduces output noise and improves transient response. see the applications information section for calculating the value of the feedforward capacitor; the internal divider current is 5 a. this pin should not be used for any other purpose. proportional to the byp capacitor value. if the lt3065 is placed in shutdown, byp is actively pulled low by an internal device to reset soft- start. if low noise or soft- start performance is not required, this pin must be left floating ( unconnected). do not drive this pin with any active circuitry . because the ref/byp pin is the reference input to the error amplifier, stray capacitance at this point should be minimized. special attention should be given to any stray capacitances that can couple external signals onto the ref/byp pin producing undesirable output transients or ripple. a minimum capacitance of 100 pf from ref/byp to gnd is recommended. output ( pins 9,10/pins 11,12): output. these pins sup- ply power to the load. stability requirements demand a minimum 3.3 f ceramic output capacitor with an esr < 1 to prevent oscillations. applications with output voltages less than 1.2 v require a minimum 4.7 f ceramic output capacitor. large load transient applications require larger output capacitors to limit peak voltage transients. see the applications information section for details on transient response and reverse output characteristics. permissible output voltage range is 600mv to 40v. adjustable version only gnd (pin 7, exposed pad pin 11/pin 9, exposed pad pin 13): ground. the exposed pad of the dfn and msop packages is an electrical connection to gnd. to ensure proper electrical and thermal performance, solder pin 11/pin 13 to the pcb gnd and tie it directly to pin 7/pin 9. for the adjustable lt3065, connect the bottom of the external resistor divider that sets output voltage directly to gnd (pin 7/pin 9)for optimum load regulation. adj (pin 8/pin 10): adjust. this pin is the error ampli - fiers inverting terminal. its typical bias current of 16na flows out of the pin ( see curve of adj pin bias current vs lt 3065 series 3065fc for more information www.linear.com/lt3065
14 p in func t ions figure 1. kelvin sense connection figure 2. system block diagram b lock diagra m in shdn r p out v in adj gnd lt3065 r p r1 r2 + + load in shdn 3065 f01 r p out v in sense gnd fixed voltage version adjustable version lt3065-x r p + + load + ? + ? in r5 d1 qi max 1/500x qpower 1x i max pwrgd qpwrgd 3065 f02 540mv reference gnd ref/byp *fixed voltage options only shdn adj sense* 30k r4 r1* r2* ideal diode d3 q2 d2 error amplifier thermal/ current limit current limit amplifier 100k r3 600mv reference out + ? + ? q3 + ? table 2. fixed voltage option resistor values v out (v) r1 (k?) r2 (k?) 5 120 880 3.3 120 540 2.5 120 380 1.8 120 240 1.5 120 180 1.2 120 120 lt 3065 series 3065fc for more information www.linear.com/lt3065
15 a pplica t ions i n f or m a t ion the lt3065 are micropower, low noise and low drop-out voltage, 500 ma linear regulators with micropower shut- down, programmable current limit, and a power- good flag. the devices supply up to 500ma at a typical dropout voltage of 300mv and operates over a 1.8v to 45v input range. a single external capacitor provides low noise reference performance and output soft-start functionality. for ex - ample, connecting a 10 nf capacitor from the ref/byp pin to gnd lowers output noise to 25v rms over a 10 hz to 100 khz bandwidth. this capacitor also soft starts the reference and prevents output voltage overshoot at turn- on. the lt3065 s quiescent current is merely 55 a but provides fast transient response with a low esr, minimum value 3.3f ceramic output capacitor. in shutdown, quiescent current is less than 1 a and the reference soft-start capacitor is reset. the lt3065 optimizes stability and transient response with low esr, ceramic output capacitors. the regulator does not require the addition of esr as is common with other regulators. the lt3065 typically provides better than 0.1% line regulation and 0.1% load regulation. internal protec - tion cir cuitry includes reverse battery protection, reverse output protection, reverse current protection, current limit with foldback and thermal shutdown. this bullet-proof protection set makes it ideal for use in battery-powered, automotive and industrial systems.in battery backup applications where the output is held up by a backup battery and the input is pulled to ground, the lt3065 acts like it has a diode in series with its output and prevents reverse current. adjustable operation the adjustable lt3065 has an output voltage range of 0.6 v to 40 v. output voltage is set by the ratio of two external resistors, as shown in figure 3. the device regulates the output to maintain the adj pin voltage at 0.6 v referenced to ground. the current in r1 equals 0.6 v/r1, and r2s current is r1s current minus the adj pin bias current. the adj pin bias current , 16 na at 25 c, flows from the adj pin through r1 to gnd. calculate the output voltage using the formula in figure 3. r1s value should not be greater than 62 k to provide a minimum 10 a load current so that output voltage errors, caused by the adj pin bias current, are minimized. note that in shutdown, the output is turned off and the divider current is zero. curves of adj pin voltage vs temperature and adj pin bias current vs temperature appear in the typical performance charac - teristics section. the lt3065 is tested and specified with the adj pin tied to the out pin, yielding v out = 0.6 v. specifications for output voltages greater than 0.6 v are proportional to the ratio of the desired output voltage to 0.6 v: v out /0.6v. for example, load regulation for an output current change of 1ma to 500 ma is 0.1mv ( typical) at v out = 0.6 v. at v out = 12v, load regulation is: 12v 0.6v ? (0.1mv) = 2mv figure 3. adjustable operation v in v out in out + lt3065 shdn adj gnd 3065 f03 r2 r1 v out = 0.6v 1 + r2 r1 ? ? ? ? ? ? ? i adj ? r2 ( ) v adj = 0.6v i adj = 16na at 25c output range = 0.6v to 40v lt 3065 series 3065fc for more information www.linear.com/lt3065
16 a pplica t ions i n f or m a t ion table 3 shows 1% resistor divider values for some common output voltages with a resistor divider current of 10a. table 3. output voltage resistor divider values v out (v) r1 (k?) r2 (k?) 1.2 60.4 60.4 1.5 59 88.7 1.8 59 118 2.5 60.4 191 3 59 237 3.3 61.9 280 5 59 432 bypass capacitance and output voltage noise the lt3065 regulator provides low output voltage noise over a 10 hz to 100 khz bandwidth while operating at full load with the addition of a bypass capacitor (c ref/byp ) from the ref/byp pin to gnd. a high quality low leak- age capacitor is recommended. this capacitor bypasses the internal reference of the regulator, providing a low frequency noise pole for the internal reference. with the use of 10 nf for c ref/byp , output voltage noise decreases to as low as 25v rms when the output voltage is set for 0.6v. for higher output voltages ( generated by using a feedback resistor divider), the output voltage noise gains up proportionately when using c ref/byp . to lower the higher output voltage noise, connect a feedforward capacitor (c ff ) from v out to the adj pin. a high quality, low leakage capacitor is recommended. this capacitor bypasses the error amplifier of the regulator, providing an additional low frequency noise pole. with the use of 10 nf for both c ff and c ref/byp , output voltage noise decreases to 25 v rms when the output voltage is set to 5 v by a 10 a feedback resistor divider. if the cur- rent in the feedback resistor divider is doubled, c ff must also be doubled to achieve equivalent noise performance. feedforward capacitance can also be used in fixed-voltage parts; the feedforward capacitor is connected from out to adj in the same manner. in this case, the current in the internal feedback resistor divider is 5a. higher values of output voltage noise can occur if care is not exercised with regard to circuit layout and testing. crosstalk from nearby traces induces unwanted noise onto the lt3065s output. power supply ripple rejection must also be considered. the lt3065 regulator does not have unlimited power supply rejection and passes a small portion of the input noise through to the output. using a feedforward capacitor (c ff ) connected between v out and adj has the added benefit of improving transient response for output voltages greater than 0.6 v. with no feedforward capacitor, the settling time increases as the output voltage increases above 0.6 v. use the equation in figure 4 to determine the minimum value of c ff to achieve a transient response that is similar to the 0.6 v output voltage performance regardless of the chosen output voltage ( see figure 5 and transient response in the typical performance characteristics section). figure 4. feedforward capacitor for fast transient response figure 5. transient response vs feedforward capacitor 100s/div v out = 5v c out = 10f i fb-divider = 10a 0 1nf 10nf load current 500ma/div feedforward capacitor, c ff 100pf 3065 f05 v out 100mv/div 3065 f04 in shdn out adj gnd ref/byp lt3065 v in v out c ref/byp c ff r2 r1 c out + c ff 10nf 10a ? i fb _divider ( ) i fb _divider = v out r1 + r2 lt 3065 series 3065fc for more information www.linear.com/lt3065
17 a pplica t ions i n f or m a t ion during start-up, the internal reference soft-starts when a ref/byp capacitor is used. regulator start-up time is directly proportional to the size of the bypass capacitor (see start-up time vs ref/byp capacitor in the typical performance characteristics section). the reference bypass capacitor is actively pulled low during shutdown to reset the internal reference. using a feedforward capacitor also affects start-up time. start-up time is directly proportional to the size of the feedforward capacitor and the output voltage, and is inversely proportional to the feedback resistor divider cur - rent, slowing to 15 ms with a 10 nf feedforward capacitor and a 10 f output capacitor for an output voltage set to 5v by a 10a feedback resistor divider. output capacitance and transient response the lt3065 regulator is stable with a wide range of output capacitors. the esr of the output capacitor affects stability, most notably with small capacitors. use a minimum output capacitor of 3.3 f with an esr of 1 or less to prevent oscillations. for v out less than 1.2 v, use a minimum c out of 4.7 f. if a feedforward capacitor is used with output voltages set for greater than 24 v, use a minimum output capacitor of 10 f. the lt3065 is a micropower device and output load transient response is a function of output capacitance. larger values of output capacitance decrease the peak deviations and provide improved transient re - sponse for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt3065, increase the effective output capacitor value. for applications with large load current transients, a low esr ceramic capacitor in parallel with a bulk tantalum capacitor often provides an optimally damped response. give extra consideration to the use of ceramic capacitors. manufacturers make ceramic capacitors with a variety of dielectrics, each with different behavior across tempera - ture and applied voltage. the most common dielectrics are specified with eia temperature characteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics provide high c-v products in a small package at low cost, but exhibit strong voltage and temperature coefficients, as shown in figures 6 and 7. when used with a 5 v regulator, a 16v 10 f y5v capacitor can exhibit an effective value figure 6. ceramic capacitor dc bias characteristics figure 7. ceramic capacitor temperature characteristics dc bias voltage (v) change in value (%) 3065 f06 20 0 ?20 ?40 ?60 ?80 ?100 0 4 8 10 2 6 12 14 x5r y5v 16 both capacitors are 16v, 1210 case size, 10f temperature (c) ?50 40 20 0 ?20 ?40 ?60 ?80 ?100 25 75 3065 f07 ?25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v, 1210 case size, 10f as low as 1 f to 2 f for the dc bias voltage applied, and over the operating temperature range. the x5r and x7r dielectrics yield much more stable characteristics and are more suitable for use as the output capacitor. the x7r type works over a wider temperature range and has better temperature stability, while the x5r is less expensive and is available in higher values. care still must be exercised when using x5r and x7r capacitors; the x5r and x7r codes only specify operating temperature range and maximum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors is better than y5v and z5u capacitors, but can still be significant enough to drop capacitor values below appropriate levels. capacitor dc bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verified. lt 3065 series 3065fc for more information www.linear.com/lt3065
18 a pplica t ions i n f or m a t ion figure 8. noise resulting from tapping on a ceramic capacitor v out 1mv/div 10ms/div 3065 f08 v out = 5v c out = 10f c ref/byp = 10nf voltage and temperature coefficients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, simi - lar to the way a piezoelectric accelerometer or microphone works. for a ceramic capacitor, the stress is induced by vibrations in the system or thermal transients. the resulting voltages produced cause appreciable amounts of noise. a ceramic capacitor produced the trace in figure 8 in response to light tapping from a pencil. similar vibration induced behavior can masquerade as increased output voltage noise. stability and input capacitance low esr, ceramic input bypass capacitors are acceptable for applications without long input leads. however, appli - cations connecting a power supply to an lt3065 circuits in and gnd pins with long input wires combined with a low esr, ceramic input capacitors are prone to voltage spikes, reliability concerns and application-speci?c board oscillations. the input wire inductance found in many battery-powered applications, combined with the low esr ceramic input capacitor, forms a high q lc resonant tank circuit. in some instances this resonant frequency beats against the output current dependent ldo bandwidth and interferes with proper operation. simple circuit modifications/ solu- tions are then required. this behavior is not indicative of lt3065 instability, but is a common ceramic input bypass capacitor application issue. the self-inductance, or isolated inductance, of a wire is directly proportional to its length. wire diameter is not a major factor on its self-inductance. for example, the self- inductance of a 2- awg isolated wire (diameter = 0.26") is about half the self-inductance of a 30- awg wire ( diameter = 0.01"). one foot of 30- awg wire has approximately 465nh of self-inductance. tw o methods can reduce wire self- inductance. one method divides the current ? owing towards the lt3065 between two parallel conductors. in this case, the farther apart the wires are from each other, the more the self-inductance is reduced; up to a 50% reduction when placed a few inches apart. splitting the wires connects two equal inductors in parallel, but placing them in close proximity creates mutual inductance adding to the self-inductance. the second and most effective way to reduce overall inductance is to place both forward and return current conductors ( the input and gnd wires) in very close proximity. tw o 30- awg wires separated by only 0.02 ", used as forward and return current conductors, reduce the overall self -inductance to approximately one-?fth that of a single isolated wire. if a battery, mounted in close proximity, powers the lt3065 , a 10 f input capacitor suffices for stability. however, if a distant supply powers the lt3065, use a larger value input capacitor. use a rough guideline of 1f ( in addition to the 10f minimum) per 8 inches of wire length. the minimum input capacitance needed to stabilize the application also varies with power supply output impedance variations. placing additional capacitance on the lt3065s output also helps. however, this requires an order of magnitude more capacitance in comparison with additional lt3065 input bypassing. series resistance between the supply and the lt3065 input also helps stabilize the application; as little as 0.1 to 0.5 suffices. this impedance dampens the lc tank circuit at the expense of dropout voltage. a better alternative is to use higher esr tantalum or elec- trolytic capacitors at the lt3065 input in place of ceramic capacitors. i max pin operation the i max pin is the collector of a pnp that sources a cur- rent equal to 1/500 th of output load current ( see block diagram). the i max pin is also the input to the precision lt 3065 series 3065fc for more information www.linear.com/lt3065
19 a pplica t ions i n f or m a t ion current limit amplifier. connecting a resistor (r imax ) from i max to gnd sets the current limit threshold. if the output load increases to a level such that the i max pin voltage reaches 0.6 v, the current limit amplifier takes control and regulates the i max voltage to 0.6 v, regardless of the output voltage. calculate the required r imax value for a given current limit from the following formula: r imax = 500 ? 0.6v i limit in cases where the in to out differential voltage exceeds 10v, current limit foldback lowers the internal current limit level, possibly causing it to override the external programmable current limit. see the internal current limit vs v in C v out graph in the typical performance characteristics section. the i max pin requires a 22 nf decoupling capacitor. if the external programmable current limit is not used, connect the i max pin directly to gnd. lt3065 power dissipation increases the i max threshold at a rate of approximately 0.5 percent per watt. pwrgd pin operation the pwrgd pin is an open- drain high voltage nmos digital output capable of sinking 50a . the pwrgd pin de- asserts and becomes high impedance if the output rises above 90% of its nominal value. if the output falls below 88.4% of its nominal value for more than 25 s, the pwrgd pin asserts low. the pwrgd comparator has 1.6% hysteresis and 25 s of deglitching. the pwrgd comparator has a dedicated reference that does not soft-start if a capacitor is used on the ref/byp pin. the use of a feed-forward capacitor, c ff , as shown in figure 4, can result in the adj pin being pulled artificially high during startup transients, which causes the pwrgd flag to assert early. to avoid this problem, ensure that the ref/byp capacitor is significantly larger than the feed-forward capacitor, causing ref/byp time constant to dominate over the time constant of the resistor divider network. operation in dropout some degradation of the i max current mirror accuracy occurs for output currents less than 50 ma when operat- ing in dropout. overload recovery like many ic power regulators, the lt3065 has safe oper - ating area protection. the safe area protection decreases current limit as input-to-output voltage increases, and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. the lt3065 pro - vides some output current at all values of input-to-output voltage up to the devices absolute maximum rating. when power is first applied, the input voltage rises and the output follows the input; allowing the regulator to start-up into very heavy loads. during start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. with a high input voltage, a problem can occur wherein the removal of an output short will not allow the output to recover. other regulators, such as the lt1083/lt1084/ lt1085 family and lt1764 a also exhibit this phenomenon, so it is not unique to the lt3065. the problem occurs with a heavy output load when the input voltage is high and the output voltage is low. common situations are immediately after the removal of a short circuit or if the shutdown pin is pulled high after the input voltage is already turned on. the load line intersects the output current curve at two points. if this happens, there are two stable output operat - ing points for the regulator. with this double intersection, the input power supply needs to be cycled down to zero and back up again to recover the output. lt 3065 series 3065fc for more information www.linear.com/lt3065
20 a pplica t ions i n f or m a t ion thermal considerations the lt3065s maximum rated junction temperature of 125c ( e-, i-grades) or 150c ( mp-, h-grades) limits its power handling capability. tw o components comprise the power dissipated by the device: 1. output current multiplied by the input/output voltage differential: i out ? (v in C v out ), and 2. gnd pin current multiplied by the input voltage: i gnd ? v in gnd pin current is determined using the gnd pin current curves in the typical performance characteristics section. power dissipation equals the sum of the two components listed above. the lt3065 regulator has internal thermal limiting that protects the device during overload conditions. for continuous normal conditions, do not exceed the maximum junction temperature of 125c ( e-, i-grades) or 150c ( mp-, h-grades). carefully consider all sources of thermal resistance from junction-to-ambient including other heat sources mounted in proximity to the lt3065. the undersides of the lt3065 dfn and mse packages have exposed metal from the lead frame to the die attachment. these packages allow heat to directly transfer from the die junction to the printed circuit board metal to control maximum operating junction temperature. the dual-inline pin arrangement allows metal to extend beyond the ends of the package on the topside ( component side) of a pcb. connect this metal to gnd on the pcb. the multiple in and out pins of the lt3065 also assist in spreading heat to the pcb. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through-holes also can spread the heat generated by power devices. tables 4 and 5 list thermal resistance as a function of copper area in a fixed board size. all measurements were taken in still air on a 4- layer fr-4 board with 1 oz solid internal planes, and 2 oz external trace planes with a total board thickness of 1.6 mm. for further information on thermal resistance and using thermal information, refer to jedec standard jesd51, notably jesd51-12. table 4. msop measured thermal resistance copper area board area thermal resistance (junction-to-ambient) topside backside 2500 sq mm 2500 sq mm 2500 sq mm 28c/w 1000 sq mm 2500 sq mm 2500 sq mm 31c/w 225 sq mm 2500 sq mm 2500 sq mm 32c/w 100 sq mm 2500 sq mm 2500 sq mm 33c/w table 5. dfn measured thermal resistance copper area topside board area thermal resist ance (junction-to-ambient) 2500 sq mm 2500 sq mm 31c/w 1000 sq mm 2500 sq mm 32c/w 225 sq mm 2500 sq mm 34c/w 100 sq mm 2500 sq mm 35c/w calculating junction temperature example: given an output voltage of 5 v, an input voltage range of 12v 5%, a maximum output current range of 75ma and a maximum ambient temperature of 85 c, what is the maximum junction temperature? the power dissipated by the device equals: i out(max) ? (v in(max) C v out ) + i gnd ? v in(max) where: i out(max) = 75ma v in(max) = 12.6v i gnd at (i out = 75ma, v in = 12v) = 3.5ma so: p = 75ma ? (12.6v C 5v) + 3.5ma ? 12.6v = 0.614w lt 3065 series 3065fc for more information www.linear.com/lt3065
21 a pplica t ions i n f or m a t ion using a dfn package, the thermal resistance ranges from 31c/w to 35 c/w depending on the copper area. so the junction temperature rise above ambient approximately equals: 0.614 w ? 35c/w = 21.5c the maximum junction temperature equals the maxi- mum ambient temperature plus the maximum junction temperature rise above ambient or: t jmax = 85c + 21.5c = 106.5c protection features the lt3065 incorporates several protection features that make it ideal for use in battery-powered circuits. in ad - dition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device also protects against reverse input voltages, reverse output voltages and reverse output-to- input voltages. current limit protection and thermal overload protection protect the device against current overload conditions at the lt3065s output. the typical thermal shutdown temperature is 165 c with about 7 c of hysteresis. for normal operation, do not exceed a junction temperature of 125c (e-, i-grades) or 150c (mp-, h-grades). the lt3065 in pin withstands reverse voltages of 50v . the device limits current flow to less than 1 a ( typically less than 25 na) and no negative voltage appears at out. the device protects both itself and the load against batteries that are plugged in backwards. figure 9. reverse output current v out (v) 0 0 output current (a) 0.1 0.3 0.4 0.5 1.0 0.7 10 20 25 40 3055 f09 0.2 0.8 0.9 0.6 5 15 30 35 v in = 0 the lt3065 incurs no damage if its output is pulled be- low ground . if the input is left open circuit or grounded, the output can be pulled below ground by 50 v. no cur- rent flows through the pass transistor from the output. however, current flows in ( but is limited by) the feedback resistor divider that sets the output voltage. current flows from the bottom resistor in the divider and from the adj pins internal clamp through the top resistor in the divider to the external circuitry pulling out below ground. if a voltage source powers the input, the output sources cur - rent equal to its current limit capability and the lt3065 protects itself by thermal limiting. in this case, grounding the shdn pin turns off the device and stops the output from sourcing current. lt 3065 series 3065fc for more information www.linear.com/lt3065
22 programming undervoltage lockout power supply sequencing using pwrgd lt3065 r1 in shdn r2 v in > v uvlo in 3065 ta02 v uvlo = r1 + r2 r2 ? 1.1v lt3065 in shdn in lt3065 in shdn pwrgd 3065 ta03 500k typical a pplica t ions lt 3065 series 3065fc for more information www.linear.com/lt3065
23 typical a pplica t ions led driver/current source lt3065 2k 22nf out in pwrgd shdn i max 100k i = 100ma 6 led 10nf 10f 3065 ta05 gnd ref/byp adj 5v in open-led indicator shdn i lim = 150ma current monitor r imax to adc lt3065 i max 3065 ta04 r imax = 600mv i out(max) ? ? ? ? ? ? ? ? ? 500 v lim = i out 500 ? r imax lt 3065 series 3065fc for more information www.linear.com/lt3065
24 typical a pplica t ions paralleling regulators for higher output current lt3065 49.9 in pwrgd shdn out adj gnd ref/byp 500k 10f 10f 2.5v 1a 6.04k 1% 10nf 3065 ta06 19.1k 1% 6.04k 1% 21k 1% v in > 3v pwrgd shdn i max lt3065 49.9 in pwrgd shdn out adj gnd ref/byp 10nf 0.1f i max ? + 10k lt1637 1k 33nf 1k 6.8k 10f 10f lt 3065 series 3065fc for more information www.linear.com/lt3065
25 p ackage descrip t ion dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1669 rev c) 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd) dfn rev c 0310 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.70 0.05 3.55 0.05 package outline 0.25 0.05 0.50 bsc dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699 rev c) pin 1 notch r = 0.20 or 0.35 45 chamfer please refer to http://www .linear.com/product/lt3065#packaging for the most recent package drawings. lt 3065 series 3065fc for more information www.linear.com/lt3065
26 p ackage descrip t ion mse package 12-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1666 rev g) msop (mse12) 0213 rev g 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.22 ?0.38 (.009 ? .015) typ 0.86 (.034) ref 0.650 (.0256) bsc 12 12 11 10 9 8 7 7 detail ?b? 1 6 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane recommended solder pad layout bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 1 2 3 4 5 6 3.00 0.102 (.118 .004) (note 4) 0.406 0.076 (.016 .003) ref 4.90 0.152 (.193 .006) detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc mse package 12-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1666 rev g) please refer to http://www .linear.com/product/lt3065#packaging for the most recent package drawings. lt 3065 series 3065fc for more information www.linear.com/lt3065
27 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 7/14 added fixed voltage options and related specs, curves, pin functions, text modified pinouts to accommodate new fixed voltage options added specification for absolute maximum sense pin voltage modified bypass capacitance section throughout 2 2 10 b 11/14 fixed pin function description 13 c 05/17 corrected input ripple rejection graph; changed 100nf to 100pf added bypass capacitor to led driver application circuit 9 23 lt 3065 series 3065fc for more information www.linear.com/lt3065
28 ? linear technology corporation 2014 lt 0517 rev c ? printed in usa www.linear.com/lt3065 r ela t e d p ar t s typical a pplica t ion adjustable high efficiency regulator lt3065 gnd in shdn pwrgd ref/byp out adj imax 10f 0.6v to 10v out 200ma 61.9k 1% 1.2k 22nf 100k 255k 10k * differential voltage on lt3065 1.4v set by the tp0610l p-channel threshold. tp0610l 47f 2 mbrm140 4.7f 10nf 10nf 3065 ta07 1m lt3493 cmdsh-4e gnd 10h v in shdn boost sw fb 0.1f 100k 0.1f 1f 10f 4.5v to 25v part number description comments lt1761 100ma, low noise ldo 300mv dropout voltage, low noise: 20v rms , v in = 1.8v to 20v, thinsot? package lt1762 150ma, low noise ldo 300mv dropout voltage, low noise: 20v rms , v in = 1.8v to 20v, ms8 package lt1763 500ma, low noise ldo 300mv dropout voltage, low noise: 20v rms , v in = 1.8v to 20v, so-8 and 3mm 4mm dfn packages lt1962 300ma, low noise ldo 270mv dropout voltage, low noise: 20v rms , v in = 1.8v to 20v, ms8 package lt1964 200ma, low noise negative ldo v in = C2.2v to C20v, v out(min) = C1.21v, v do = 0.34v, i q = 30a, i sd = 3a, low noise <30v rms , stable with ceramic capacitors, thinsot and 3mm 3mm dfn packages lt1965 1.1a, low noise ldo 290mv dropout voltage, low noise: 40v rms , v in = 1.8v to 20v, v out = 1.2v to 19.5v, stable with ceramic capacitors, to-220, dd-pak, msop and 3mm 3mm dfn packages lt 3050 100ma ldo with diagnostics and precision current limit 340mv dropout v oltage, low noise: 30v rms , v in = 1.8v to 45v, 3mm 2mm dfn and msop packages lt3055 500ma ldo with diagnostics and precision current limit 350mv dropout voltage, low noise: 25v rms , v in = 1.8v to 45v, 4mm 3mm dfn and msop packages lt3060 100ma low noise ldo with soft-start 300mv dropout voltage, low noise: 30v rms , v in = 1.8v to 45v, 2mm 2mm dfn and thinsot packages LT3080/ LT3080-1 1.1 a, parallelable, low noise ldo 300mv dropout voltage (2-supply operation), low noise 40v rms , v in = 1.2v to 36v, v out = 0v to 35.7v, current-based reference with 1-resistor v out set, directly parallelable, stable with ceramic capacitors, to-220, sot-223, msop and 3mm 3mm dfn lt3082 200ma, parallelable, low noise ldo outputs may be paralleled for higher output current or heat spreading, wide input voltage range: 1.2v to 40v, low value input/output capacitors required: 2.2f, single resistor sets output voltage, 8-lead sot-23, 3-lead sot-223 and 8-lead 3mm 3mm dfn packages lt3085 500ma, parallelable, low noise ldo 275mv dropout voltage (2-supply operation), low noise 40v rms , v in = 1.2v to 36v, v out = 0v to 35.7v, current-based reference with 1-resistor v out set, directly parallelable, stable with ceramic capacitors, ms8e and 2mm 3mm dfn-6 packages lt 3065 series 3065fc for more information www.linear.com/lt3065

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